March 30, 2017
A central theme on VNA Reflections is how Vector Network Analyzers (VNAs) are well suited for signal integrity (SI) applications. VNAs have become an important tool in these high-speed designs because digital signals are fundamentally analog in nature and, as such, can be adversely affected by factors such as noise, distortion and loss. In this post, we will examine the materials and procedures required for SI compliance testing of USB Type C cables using a VNA.
USB Type C cables are expected to support data rates of up to 10 GB/s for USB 3.1 Gen 2 and deliver up to 100 W of power, as well as traditional audio and video. They must do this all within a cable that utilizes a robust yet slim connector that allows a reversible plug orientation and cable direction. Figure 1 provides a diagram of USB Type C cables.
To meet the ambitious goals for USB Type C cables, specifications were published in the USB 3.1 specification package available from the USB Implementer’s Forum (USB-IF). To complement the specification and enable measurement of compliance in real products, the USB-IF has instituted a Compliance Program that provides reasonable measures of acceptability of insertion loss, return loss and other similar parameters.
Method of Implementation
To simplify compliance testing, companies create methods of implementations (MOIs) that provide a step-by-step process to verify products such as USB Type C cables. One example is how Anritsu is working with Granite River Labs (GRL) to create an automated USB Type C Cable Assembly Compliance Testing MOI and with Luxshare, who provides USB Type C fixtures.
The MOI includes:
• An equipment list and how to configure it
• Required calibrations and how to achieve them
• A network extraction process to capture the effects of the fixtures
• Process to de-embed the fixture effects from the USB Type C cable measurements
• Method for transforming the impedance of the measurement system to that of the USB Type C cable
• Instructions on how to select the desired measurements, traces, and tests
• Instructions on how to generate a report that captures the results.
This particular MOI utilizes Anritsu’s MS46524B ShockLine VNA, however, depending on the SI requirements, users can select from a number of instruments for other applications that extend to the industry-leading VectorStar family, which can be configured to sweep from 70 kHz to 145 GHz in a single coaxial connection. In addition to a VNA, high-speed, low-speed and calibration fixtures from Luxshare are required, as well as automation software from GRL, which allows the user to select the cable type being tested and the associated test type.
After the VNA is configured, it needs to be calibrated, which is critical for making accurate S-parameter measurements. The automated MOI will allow users to pick from a list of available calibration options. For the MOI described, a full 4-port calibration using the short-open-load-thru (SOLT) algorithm is recommended.
Ideally, calibration can be performed directly at the DUT, but this is not always possible. VNAs such as the Shockline MS46524B Series are equipped with embedding/de-embedding functionality. De-embedding is generally used for removal of test fixture contributions, modeled networks and other networks described by S-parameters from actual measurements. Similarly, the embedding function can be used to simulate matching circuits for optimizing amplifier designs or simply adding effects of a known structure to a measurement.
In the case of this MOI, the effects of the fixtures must be de-embedded to measure the performance of only the USB Type C cables. To determine the effects of the fixtures, a network extraction is performed. The extracted network is then de-embedded from the measurement.
The last calibration step is an impedance transformation. Most VNA calibrations are performed in reference to 50 Ω. The impedance transformation function allows for performance of a calibration in one impedance and then transformation of the result to appear as if it had been calibrated in a different impedance.
After the VNA setup process is complete, engineers are ready to make measurements. Multiple traces may be required for each measurement. For example, in the crosstalk-related measurements, the compliance specification cites the need for near end cross talk (NEXT) informative traces showing Tx side A and Rx Side A, as well as between Tx side B and Rx side B. Engineers will likely conduct all measurements and utilize all traces the first time they perform the MOI. Portions of the process can be repeated if any issues occur. The GRL automated software enables users to select the measurements, traces, and tests they want to make, indicating what has and has not been completed.
Reports can be created to display:
• DUT information (manufacturer, model number and serial number)
• Where the test was conducted, by whom, when and with what software revision
• All tests performed and a summary of the results
• Individual test specifics; some will include screen shots of the associated measurements
Some common causes of unexpected behavior in the SI channel include reflections, group delay, crosstalk, and frequency bandwidth limitations. Crosstalk is an important parameter for applications with multiple channels, such as a 100 GbE application that contains four 25-Gb channels or a USB cable.
Crosstalk is an undesired coupling that often occurs as a consequence of micro-strip traces or unshielded dual conductor cables being in close proximity. Space availability often makes it difficult to maintain several line widths of physical separation on a board. Printing grounded areas between the traces or adding ground vias provides a measure of decoupling of the “E” fields, but this requires additional board space. Grounding strategies, barrier walls and tapers are some other mitigation options.
While parasitic coupling can occur anywhere along a line, the end terminations are especially problematic. Because of this, SI engineers are often concerned with NEXT and Far End Crosstalk (FEXT) and are defined with respect to the port to which the stimulus is applied.
VNAs can convert their frequency domain measurements to the time domain, which can assist with utilizing the propagation velocity to determine the distance to fault and finding the location of an issue affecting the signal. Figure 2 shows an example of two anomalies. Based on the time in which they occur, it can be determined that they are caused by transitions between coax to micro-strip transmission lines.
If there is an issue in the time domain, time gating may allow the user to observe the channel behavior without the issue. Utilizing the Anritsu MS46524B time gating function, a user can set up a start, stop or center span combination to define a gate. The engineer can then direct the VNA to disregard what happens inside or outside of the gate. It may be possible to time gate the suspected cause of the issue to determine if the resultant behavior returns to what was expected.
The MS46524B can also be equipped with Advanced Time Domain capability. This allows for checking for passivity and causality issues; combining .sNp files to address times when an instrument has fewer ports than the DUT; plotting an eye diagram; crosstalk; TDR, TDT, and skew; and performing compliance testing for other standards beyond USB Type C. The engineer can also plot an eye diagram directly from the VNA menu.
The user can also apply TX feed forward equalization (FFE), RX continuous time linear equalization (CTLE) and RX decision feedback equalizer (DFE) tap coefficients to the simulation and even create an eye mask for quick go/no-go determinations. The utility not only plots the eye diagram, but also reports optimized TX tap coefficients, optimized continuous time filter DC gain settings, optimized decision feedback equalizer coefficients, jitter and eye height and width.